IP Logic Design Engineer

Altera · Bengaluru, IN

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Job Details: Job Description: About the role Altera is looking for a hands-on Senior RTL Design Engineer to lead FPGA design and platform enablement for Altera development kits. This role spans architecture, Verilog/SystemVerilog implementation, Quartus flows and timing closure, board bring-up, interface validation, and system-level debug. The ideal candidate can move comfortably from a system requirement or board schematic to a robust RTL implementation, then bring the...