Design Architect
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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence HSV group is responsible for development of the Palladium and Protium emulation hardware and software system. This includes developing design and verification components for complex protocols, to be used for emulation, for e.g. System Verilog/Verilog components and SW components written in C/C++ and SV-UVM. It also requires development of system level RTL...
- CSS
- C++